It will be 50 years come April, since Gordon Moore made his famous projection that the number of transistors in a silicon chip would double every two years or so. When Intel made the world’s first integrated circuit, it had 2300 transistors. The latest Core i7 chip, has more than a billion. In the process, each transistor shrank in size: it is now around 20 nanometers (a nanometer is one-billionth of a meter).
If Moore’s Law holds true, technology will shrink the transistor to 14nm at the end of this year and 10 NM, three years hence. But around 2020, scientists say, the silicon saga will end. Shrinking the transistor beyond 7nm seems extremely difficult; the conducting paths will be too thin to make.
Dr Moore saw this coming. “It can’t continue forever”, he said in 2005, “Eventually disaster happens.” Dr Supratik Guha, Director of Physical Sciences at IBM agrees: “Silicon will probably go down by another three or four shrinkage steps. After that, it’s going to hit a wall.”
No wonder researchers are racing to find other materials that might be used for making computer chips, post 2020.
Some swear by silicon photonics: where the wired connections in silicon are replaced by light beams. Others plump for neural computing, using biological units that mimic neurons, the building blocks of the human brain. It doesn’t look like these initiatives will succeed before the deadline.
The most promising option seems to lie in carbon or rather its purest form, called graphene. Roll up a very thin sheet of graphene, then chop it into tiny pieces called carbon nano tubes and you have stuff that is a great conductor of electricity signals move 10 times faster than through silicon. And here’s the bonus, very little energy is lost by way of heat.
A cool technology indeed and the team that is closest world-wide, to realising a Carbon Nano tube computer, is led by an Indian Kolkata-bred, Jadavpur University, IIT Kharagpur and Stanford University (US)-educated Subhasish Mitra. Today he is an Associate Professor of Electrical Engineering and of Computer Science, at Stanford.
His team has already demonstrated the carbon computer – 2 years ago. It made headlines when it was featured on the cover of Nature magazine in September 2013. Composed of 178 transistors, each containing between 10 and 200 carbon nanotubes, it ran simple tasks and was hailed as a “true milestone in the fields of carbon -and-nano electronics”.
But the real task lay ahead: how to ensure that the carbon nanotube could be fabricated in millions to the same accuracy so that the computers could be scaled up to real power. Last month, this test too was passed, as Prof Mitra told IndiaTechOnline in a special briefing on the sidelines of a VLSI conference in Bangalore. The process established at Stanford’s Nano Fabrication Facility, was scalable for real world manufacture.
What’s more, the Mitra-led team has also cracked another problem: how to get the memory part of a computer to coexist with the computing part on the same chip. They accomplished this by applying the principle of a BigMac burger: place alternate layers of logic and memory on top of each other to form the world’s first ‘high rise’ chip. “Our design and fabrication techniques are scalable,” says Mitra “With further development this architecture could lead to computing performance that is much, much greater than anything available today.”
And cooler too! Energy efficiencies could improve a thousand-fold he suggests. Chips have become smaller, faster, cheaper for decades. If the lurch from silicon to carbon nano tubes happens in the next decade, they could be taller and (literally!) cooler.